• Тип карточки товара: Сложная
• Application, features: Digital IC,<br /><br />Epitaxy =2.4¸6.0 V<br /><br /> <br /><br />For 3.0 V<br /><br />NMOS: Vtn=0.6 V, Usd >5 V<br /><br />PMOS: Vtр=-0.6 V, Usd >5 V<br /><br />For 5.0 V<br /><br />NMOS: Vtn=1.0 V, Usd >8 V<br /><br />PMOS: Vtр=-0.9 V, Usd >8 V
• Process Description: Number of photolithographies, pcs.            22<br /><br />Design rule, μm                                        0.35<br /><br />Substrate:                         725KDB0,015(100)<br /><br />Epitaxial layer:                                15KDB12<br /><br />2 retrograde wells for high-voltage transistors<br /><br />2 retrograde wells for low-voltage transistors<br /><br />Interlayer dielectric:<br /><br />SACVD SiO2 + PC TEOS, μm        1.05 μm<br /><br />Gate SiO2, Å    70 for low-voltage transistors<br /><br />                        350 for high-voltage transistors<br /><br />Channel length<br /><br />NMOS/PMOS, μm     0.35 for low-voltage<br /><br />                                    transistors<br /><br />NMOS/PMOS, μm     1.0 for high-voltage<br /><br />                                    transistors                                               <br /><br />N&amp;P LDD- drains<br /><br />Titanium silicide<br /><br />Metal I,2                                Ti/AlCu / Ti /TiN<br /><br />Contacts 1 (W-filled), μm                        ø 0.4<br /><br />Metal 1 pitch, μm                                    0.95<br /><br />Metal                                                  Ti/AlCu<br /><br />Contacts 2,3 (W-filled), μm                      ø 0.5<br /><br />Metal 2 pitch, μm                                      1.1