5 V, 1.5 µm CMOS, 1 PolySi, 2 Me
5 V, 1.5 µm CMOS, 1 PolySi, 2 Me
- Application, features: Small and medium-scale integration logic IC, VDD < 5 V<br /><br />NMOS:<br /><br />Vtn= 0.8 V, Usd >12 V<br /><br />PMOS:<br /><br />Vtp= -0.8 V, Usd >12 V
- Process Description: Number of masks, pcs. 14<br /><br />Design rule,µm 1.5<br /><br />Substrate: Si/ P-doped/n-type/Res 4.5 <br /><br />N/P-well depth, µm 5/5<br /><br />Interlayer dielectric: BPSG<br /><br />Interlevel dielectric: PE oxide<br /><br />Gate SiO2, Å 245<br /><br />Channel length:<br /><br />NMOS/PMOS,µm 1.4/2.0<br /><br />N LDD-drains<br /><br />space line PolySi , µm 3.4<br /><br />contacts 1, µm 1.5*4.5<br /><br />space line Me 1, µm 6.0<br /><br />contacts 2, µm 3.0*4.5<br /><br />space line Me 2, µm 9.5
- Тип карточки товара: Сложная
- Application, features: Small and medium-scale integration logic IC, VDD < 5 V<br /><br />NMOS:<br /><br />Vtn= 0.8 V, Usd >12 V<br /><br />PMOS:<br /><br />Vtp= -0.8 V, Usd >12 V
- Process Description: Number of masks, pcs. 14<br /><br />Design rule,µm 1.5<br /><br />Substrate: Si/ P-doped/n-type/Res 4.5 <br /><br />N/P-well depth, µm 5/5<br /><br />Interlayer dielectric: BPSG<br /><br />Interlevel dielectric: PE oxide<br /><br />Gate SiO2, Å 245<br /><br />Channel length:<br /><br />NMOS/PMOS,µm 1.4/2.0<br /><br />N LDD-drains<br /><br />space line PolySi , µm 3.4<br /><br />contacts 1, µm 1.5*4.5<br /><br />space line Me 1, µm 6.0<br /><br />contacts 2, µm 3.0*4.5<br /><br />space line Me 2, µm 9.5